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芯片物理设计工程师岗位职责
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芯片物理设计工程师九州华兴集成电路设计(北京)有限公司九州华兴集成电路设计(北京)有限公司,九州华兴,九州华兴WorkwithFrond-EnddesignteamandPhysicaldesignteamforlargescaleASICchipphysicalimplementation(HierarchicalDesign).Includetoplevelphysicalpartition,blocksizingandshaping,blockportassignment,powerplanning,top/blocklevelP&Rimplementation.
Workforprojecthighqualityandontimedelivery.
Responsibilities:
1.ResponsibleforVerilogtoGDSimplementation,powersignoff,areaEvaluation,Timingclosure,STA,Physicalverification
2.ExperiencedinEDAtools(e.g.Synopsys,Candence,Mentoretc)
3.Criticalissueresolveontopcongestionortimingissues.
4.Betterbeexpertononeormoreaspectlike:clocktreesynthesis/power/physicalverification.
SkillsandKnowledge:
1.Goodknowledgeforsynthesis,floorplan,place-and-route,timingclosure,DFM,DFT,poweranalysis,Signalintegrityanalysis,Hierarchicalflow
2.Goodatusingscriptprocessing.(TCL、Perl……)
3.Projecttapeoutexperienceisneeded
4.28nmandbeyond(advancednode)tapeoutexperienceisagoodplus.
5.Strongverbalcommunicationandinterpersonalskillstoworkcloselywithavarietyofindividual
6.Teamworkspirit
Qualifications
EducationandExperience
MSEEwith3+yearsorBachelorwith5+ofindustrialexperienceofdeepsubmicrondigitalASICdesign.
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